Short Courses

In this tutorial, the optical and X-Ray methods used for characterization and metrology of new 3D transistor and memory devices is described. Transistors have transitioned from planar devices such as FinFETs to Nanosheet FETs which are vertically stacked nanosheet channels which carry the current flow. The roadmap for future devices continues this 3D trend with ForkFETs and CMOS FETs which are also 3D structures. Memory devices, such as a flash memory device called 3D NAND, are fabricated from layer stacks projected to have over 100 layers of either SiO₂/SiN or Si/SiO₂ depending on the manufacturer. Recently, R&D efforts have extended to 3D DRAM memory devices which consist of films stacks with Si/Si(1-x)Gex layers. The move to 3D structures is increasing the challenges facing measurement methods. In this talk, we discuss how optical and X-Ray methods are used to measure the feature shape and dimensions of these structures. The use of X-Ray methods such as 𝜔 − 2𝜃 scans and reciprocal space maps provide layer thickness and stress characterization. We will also discuss how visible wavelength Mueller Matrix spectroscopic ellipsometry (MMSE) based scatterometry is used to measure feature shape and dimension for the nanowire/nanosheet structures used to fabricate nanosheet transistors and eventually 3D DRAM. MMSE can be extended into the infra-red or into the EUV increasing capability for specific features depending on the structure and associated materials. In addition, small angle X-Ray scattering has been adapted into a method knows as CDSAXS which can be used to characterize 3D device structures. This talk will be an overview of these methods along with recent advances. The talk will include a discussion about the approximations used in interpreting optical scatterometry and X-Ray diffraction measurements in light of recent electron microscopy data.